| A Simulation Experiment on a Built-In Self Test Equipped with Pseudorandom Test Pattern Generator and Multi-Input Shift Register (MISR) |
| Afaq Ahmad, Sultan Qaboos University - Muscat, Sultanate of Oman |
| Volume : 1 volume number : 4 pdf |
| A Low Power VITERBI Decoder Design With Minimum Transition Hybrid Register Exchange Processing For Wireless Applications |
| S. L. Haridas1 and N. K. Choudhari2, 1B. D. College of Engg., India and 2Smt. Bhagvati Chaturvedi College of Engg., India |
| Volume : 1 volume number : 4 pdf |
| Single Electron Transistor: Applications & Problems |
| Om Kumar and Manjit Kaur, Centre for Development of Advanced Computing - Mohali, India |
| Volume : 1 volume number : 4 pdf |
| Design and Analysis of Multi Vt and Variable Vt based Pipelined Adder for Low Power applications |
| Shanthala S, Cyril Prasanna Raj P and S.Y.Kulkarni, Nitte Mahalinga Adyanthaya Memorial Institute of Technology-Nitte, India |
| Volume : 1 volume number : 4 pdf |
| Pipelining Architecture of AES Encryption and Key Generation with Search Based Memory |
| Subashri T, Arunachalam R, Gokul Vinoth Kumar B and Vaidehi V Anna University - Chennai, India |
| Volume : 1 volume number : 4 pdf |