| BackTrack Input Vector Algorithm for Leakage Reduction in CMOS VLSI Digital Circuit Design |
| Uday Panwar and Kavita Khare, MANIT, India |
| Volume : 5 volume number : 2 pdf |
| Advanced ATPG Based on Fan, Testability Measures and Fault Reduction |
| Vaishali Dhare and Usha Mehta, Nirma University, India |
| Volume : 5 volume number : 2 pdf |