| An Analytical Model for Fringing Capacitance in Double gate Hetero Tunnel FET and Analysis of effect of Traps and Oxide charges on Fringing Capacitance |
| Brinda Bhowmick and Srimanta Baishya, National Institute of Technology - Silchar, India |
| Volume : 3 volume number : 1 pdf |
| Leakage Power Reduction and Analysis of CMOS Sequential Circuits |
| M. Janaki Rani1 and S. Malarkann2, 1Sathyabama University, India and 2Manakula Vinayagar Institute of Technology, India |
| Volume : 3 volume number : 1 pdf |
| Self Correcting Memory Design for Fault Free Coding in Progressive Data Streaming Application |
| Harikishore.Kakarla1, Madhavi Latha.M2 and Habibulla Khan1, 1KL University, India and 2JNTUH, India |
| Volume : 3 volume number : 1 pdf |
| Giga bit per second Differential Scheme for High Speed Interconnect |
| Mandeep Singh Narula, Pankaj Rakheja and Charu Rana, ITM University, India |
| Volume : 3 volume number : 1 pdf |
| Multi User Detector in CDMA Using Elliptic Curve Cryptography |
| M. Ranga Rao and B. Prabhakara Rao, JNTU, India |
| Volume : 3 volume number : 1 pdf |
| Design and Modelling of Different SRAM'S Based on CNTFET 32NM Technology |
| Naagesh. S. Bhat, Mahindra Satyam Ltd., India |
| Volume : 3 volume number : 1 pdf |
| High Speed, Low Power Current Comparators with Hysteresis |
| Neeraj K. Chasta, Dhirubhai Ambani Institute of Iinformation & Communication Technology, India |
| Volume : 3 volume number : 1 pdf |
| Performance Evaluation of Different SRAM Cell Structures at Different Technologies |
| Sapna Singh, Neha Arora, Meenakshi Suthar and Neha Gupta, Mody Institute of Technology and Science, India |
| Volume : 3 volume number : 1 pdf |
| Dual Metal Gate and Conventional MOSFET at Sub nm for Analog Application |
| Sonal Aggarwal and Rajbir Singh, Kurukshetra university, India |
| Volume : 3 volume number : 1 pdf |
| System on Programable Chip for Performance Estimation of Loom Machine [ |
| Gurpreet Singh1 , Ajay Kumar Roy1 , Surekha K S2 , S Pujari3, 1Infosys, India, 2Army Institute of Technology, India and 3Sambalpur University, |
| Volume : 3 volume number : 1 pdf |
| Low Power Folded Cascode OTA |
| Swati Kundra1, Priyanka Soni1 and Anshul Kundra2, 1Mody Institute of Technology & Science, India and 2Ambedkar Institute of Technology, India |
| Volume : 3 volume number : 1 pdf |
| A 3-14 GHZ Low Noise Amplifier for Ultra Wide Band Applications |
| Vaithianathan Venkatesan1, Raja Janakiraman2, Srinivasan Raj3, Aishwarya Prabakaran1, Anupreethi Balaji Ranganathan1 and Divya Santhanam1, 1Sri Sivasubramaniya Nadar College of Engineering, India, 2Anna University of Technology - Tiruchirappali, India and 3Sri Sivasubramaniya Nadar College of Engineering, India |
| Volume : 3 volume number : 1 pdf |
| Area, Delay and Power Comparison of Adder Topologies |
| R.Uma1,Vidya Vijayan2, M. Mohanapriya2 and Sharon Paul2, 1Pondicherry University, India and 2Rajiv Gandhi College of Engineering and Technology, India |
| Volume : 3 volume number : 1 pdf |
| Faster Interleaved Modular Multiplier Based on Sign Detection |
| Mohamed A. Nassar, and Layla A. A. El-Sayed, Alexandria University, Egypt |
| Volume : 3 volume number : 1 pdf |
| Bus Encoder for Crosstalk Avoidance in RLC Modeled Interconnects |
| G. Nagendra Babu, Deepika Agarwal, B. K. Kaushik and S. K. Manhas, Indian Institute of Technology - Roorkee, India |
| Volume : 3 volume number : 1 pdf |