 |
AIRCC Digital Library |
 |
Digital Signal And Image Processing
VLSICS
ISSN : 0976 - 1357 (Online) ; 0976 - 1527 (print)
volume - 1 - 1
volume - 1 - 2
volume - 1 - 3
volume - 1 - 4
volume - 2 - 1
volume - 2 - 2
volume - 2 - 3
volume - 2 - 4
volume - 3 - 1
volume - 3 - 2
volume - 3 - 3
volume - 3 - 4
volume - 3 - 5
volume - 3 - 6
volume - 4 - 1
volume - 4 - 2
volume - 4 - 3
volume - 4 - 4
volume - 4 - 5
volume - 4 - 6
volume - 5 - 1
volume - 5 - 2
volume - 5 - 3
volume - 5 - 4
volume - 5 - 5
volume - 5 - 6
volume - 6 - 1
volume - 6 - 2
volume - 6 - 3
volume - 6 - 4
volume - 6 - 5
volume - 6 - 6
volume - 7 - 1
volume - 7 - 3
volume - 7 - 4
volume - 7 - 5
volume - 8 - 1
volume - 8 - 2
volume - 8 - 3
volume - 9 - 1
volume - 9 - 2
volume - 9 - 3
volume - 9 - 4
volume - 9 - 5
volume - 10 - 1
volume - 10 - 2
volume - 10 - 3
volume - 10 - 4
volume - 10 - 5
volume - 11 - 5
volume - 11 - 6
volume - 13 - 6
volume - 14 - 2
volume - 15 - 3
| A BIST Generator CAD Tool for Numeric Integrated Circuits |
| Chiraz Khedhiri1, Mouna Karmani1 and Belgacem Hamdi1,2, 1Electronic & Microelectronics'LAB, Tunisia and 2ISSAT, Tunisia |
| Volume : 2 volume number : 2 pdf |
| A Novel Approach for Lower Power Design in Turbo Coding System |
| Dayadi.Lakshmaiah1, M.V.Subramanyam2 and K.Sathaya Prasad3, 1Sree Dattha Engineering and Science, India, 2Santhi Ram Engineering College, India and 3JNTU, India |
| Volume : 2 volume number : 2 pdf |
| Design and test challenges in Nano-scale analog and mixed CMOS technology |
| Mouna Karmani, Chiraz Khedhiri and Belgacem Hamdi, Electronics & Microelectronics Laboratory, Tunisia |
| Volume : 2 volume number : 2 pdf |
| Performance Comparison of RF CMOS Low Noise Amplifiers in 0.18- m technology scale |
| M.Sumathi1 and S.Malarvizhi2, 1Sathyabama University, India and 2SRM University, India |
| Volume : 2 volume number : 2 pdf |
| Design of optimized Interval Arithmetic Multiplier |
| Rajashekar B.Shettar and R.M.Banakar, BVB College of Engg and Technology, India |
| Volume : 2 volume number : 2 pdf |
| Performance of Different CMOS Logic Styles for Low Power and High Speed |
| Sreenivasa Rao.Ijjada, Ayyanna.G, G.Sekhar Reddy and V.Malleswara Rao, GITAM University, India |
| Volume : 2 volume number : 2 pdf |
| New Design Methodologies for High-Speed Mixed-Mode CMOS Full Adder Circuits |
| Subodh Wairya, Rajendra Kumar Nagaria and Sudarshan Tiwari, M.N.N.I.T, India |
| Volume : 2 volume number : 2 pdf |
| A New Approach to Design Low Power CMOS Flash A/D Converter |
| Sudakar S. Chauhan1, S. Manabala2, S.C. Bose2 and R. Chandel3, 1Graphic Era University, India, 2CEERI, India, 3National Institute of Technology - Hamirpur, India |
| Volume : 2 volume number : 2 pdf |
| A Bus Encoding to Reduce Crosstalk Noise Effect in System on Chip |
| J.Venkateswara Rao1 and A.V.N.Tilak2, 1Vignan Institute of Technology & Science, India and 2Gudlavalleru Engineering College, India |
| Volume : 2 volume number : 2 pdf |