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AIRCC Digital Library |
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Digital Signal And Image Processing
VLSICS
ISSN : 0976 - 1357 (Online) ; 0976 - 1527 (print)
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| Extended K-Map for Minimizing Multiple Output Logic Circuits |
| Palash Das1 and Bikromadittya Mondal2, 1Bengal Engineering and Science University, India and 2B P Poddar Institute of Management and Technology, India |
| Volume : 4 volume number : 4 pdf |
| Analog Modeling of Recursive Estimator Design with Filter Design Model |
| R.Rajendra prasad1, M.V.Subramanyam2 and K.Satya Prasad3, 1N.B.K.R.Institute of Science and Technology, India, 2Santhi Ram Engineering College, India and 3JNTU, India |
| Volume : 4 volume number : 4 pdf |
| Performance Analysis of Modified QSERL Circuit |
| Shipra Upadhyay, R.A. Mishra and R. K. Nagaria, Motilal Nehru National Institute of Technology, India |
| Volume : 4 volume number : 4 pdf |
| Design of High Efficiency Two Stage Power Amplifier in 0.13µM RF CMOS Technology for 2.4GHZ WLAN Application |
| Shridhar R. Sahu and A.Y. Deshmukh, G.H.Raisoni College of Engineering, India |
| Volume : 4 volume number : 4 pdf |
| A New Low Voltage P-MOS Bulk Driven Current Mirror Circuit |
| Anuj Dugaya and Laxmi Kumre, Maulana Azad National Institute of Technology, India |
| Volume : 4 volume number : 4 pdf |
| Low Power-Area Designs of 1Bit Full Adder in Cadence Virtuoso Platform |
| Karthik Reddy. G, G. Pulla Reddy Engineering college, India |
| Volume : 4 volume number : 4 pdf |