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AIRCC Digital Library |
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Digital Signal And Image Processing
VLSICS
ISSN : 0976 - 1357 (Online) ; 0976 - 1527 (print)
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| Mitigation of Soft Errors on 65NM Combinational Logic Gates via Buffer Gate |
| Ali Hosseini1 and Hadi Jahanirad2, 1Islamic Azad University, Iran and 2Kurdistan University, Iran |
| Volume : 6 volume number : 3 pdf |
| Design and Implementation of 10 Bit, 2MS/s Split SAR ADC Using 0.18um CMOS Technology |
| Kalmeshwar N. Hosur1, Girish V. Attimarad2 and Harish M. Kittur3, 1S.D.M. College of Engineering & Technology, India, 2Dayanand Sagar College of Engineering, India and 3VIT University, India |
| Volume : 6 volume number : 3 pdf |
| Evaluation of ATM Functioning Using VHDL and FPGA |
| Manali Dhar, Debolina Roy and Tamosha Saha, DSCSDEC, India |
| Volume : 6 volume number : 3 pdf |
| Schottky Tunneling Source Impact Ionization Mosfet (STS-IMOS) with Enhanced Device Performance |
| Sangeeta Singh and P.N. Kondekar, Indian Institute of Information Technology, India |
| Volume : 6 volume number : 3 pdf |
| SAF Analyses of Analog and Mixed Signal VLSI Circuit : Digital to Analog Converter |
| Vaishali Dhare and Usha Mehta, Nirma University, India |
| Volume : 6 volume number : 3 pdf |
| Minimally Buffered Router Using Weighted Deflection Routing for Mesh Network on Chip |
| Simi Zerine Sleeba and Mini M.G, Cochin University of Science and Technology, India |
| Volume : 6 volume number : 3 pdf |