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AIRCC Digital Library |
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Digital Signal And Image Processing
VLSICS
ISSN : 0976 - 1357 (Online) ; 0976 - 1527 (print)
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| A Comparative Study of Ultra-Low Voltage Digital Circuit Design |
| Aaron Arthurs, Justin Roark, and Jia Di, University of Arkansas, USA |
| Volume : 3 volume number : 3 pdf |
| CNFET Based Basic Gates and a Novel FullAdder Cell |
| Fazel Sharifi, Amir Momeni and keivan Navi, Shahid Beheshti University, Iran |
| Volume : 3 volume number : 3 pdf |
| Design and Performance Analysis of Hybrid Adders for High Speed Arithmetic Circuit |
| Rajkumar Sarma and Veerati Raju, Lovely Professional University, India |
| Volume : 3 volume number : 3 pdf |
| A Novel Full Adder Cell Based on Carbon Nanotube Field Effect Transistors |
| Ali Ghorbani, Mehdi Sarkhosh, Elnaz Fayyazi, Neda Mahmoudi and Peiman Keshavarzian, Islamic Azad University, Iran |
| Volume : 3 volume number : 3 pdf |
| A High Efficiency Charge Pump for Low Voltage Devices |
| Aamna Anil and Ravi Kumar Sharma, Lovely Professional University, India |
| Volume : 3 volume number : 3 pdf |
| Design and Performance Analysis of Nine Stages CMOS Based Ring Oscillator |
| Sushil Kumar and Gurjit Kaur, Gautam Buddha University, India |
| Volume : 3 volume number : 3 pdf |
| Performance Evaluation of CDMA Router for Network-On-Chip |
| Anant W. Hinganikar1, Mahendra A. Gaikwad1 and Rajendra M. Patrikar2, 1B.D.College of Engineering, India and 2VNIT, India |
| Volume : 3 volume number : 3 pdf |
| Design of Efficient Adder Circuits Using Proposed Parity Preserving Gate (PPPG) |
| Krishna Murthy M, Gayatri G and Manoj Kumar R, MVGRCE, India |
| Volume : 3 volume number : 3 pdf |
| Design and Performance Analysis of Ultra Low Power 6T SRAM Using Adiabatic Technique |
| Sunil Jadav, Vikrant and Munish Vashisath, YMCAUS&T, India |
| Volume : 3 volume number : 3 pdf |
| Efficient Implementation of 16-Bit Multiplier-Accumulator Using Radix-2 Modified Booth Algorithm and SPST Adder Using Verilog |
| Addanki Purna Ramesh1, A.V. N. Tilak2 and A.M.Prasad3, 1Sri Vasavi Engineering College, India, 2Gudlavalleru Engineering College, India and 3JNTU, India |
| Volume : 3 volume number : 3 pdf |
| A Review of the 0.09 uM Standard Full Adders |
| V. Vijay1, J. Prathiba1, S. Niranjan Reddy2 and P. Praveen kumar3, 1Vignan University, India, 2TCS-Chennai, India and 3QIS College of Engg. & Tech, India |
| Volume : 3 volume number : 3 pdf |